收藏本站
h) The device shall latch the host’s CRC data from D[15:00] on the negating edge of – DMACK.
i)
The device shall compare the CRC data received from the host with the results of its own CRC calculation. If
a miscompare error occurs during one or more Ultra DMA bursts for any one command, at the end of the
command, the device shall report the first error that occurred (see 6.5.4.5 ).
j) The device shall release – DDMARDY within t IORDYZ after the host has negated – DMACK.
k) The host shall neither negate STOP nor negate HSTROBE until at least t ACK after negating – DMACK.
l) The host shall not assert – IOWR, -CS0, -CS1, DA2, DA1, or DA0 until at least tACK after negating
-DMACK.
Figure 19: Ultra DMA Data-Out Burst Host Termination Timing
Notes: The definitions for the STOP, DDMARDY, and HSTROBE signal lines are no longer in effect after
DMARQ and DMACK are negated.
6.5.4.5 Ultra DMA CRC Calculation
The following is a list of rules for calculating CRC, determining if a CRC error has occurred during an Ultra DMA
burst, and reporting any error that occurs at the end of a command.
1.
2.
Both the host and the device shall have a 16-bit CRC calculation function.
Both the host and the device shall calculate a CRC value for each Ultra DMA burst.
3. The CRC function in the host and the device shall be initialized with a seed of 4ABAh at the beginning of
an Ultra DMA burst before any data is transferred.
4. For each STROBE transition used for data transfer, both the host and the device shall calculate a new CRC
value by applying the CRC polynomial to the current value of their individual CRC functions and the word
being transferred. CRC is not calculated for the return of STROBE to the asserted state after the Ultra DMA
burst termination request has been acknowledged.
5. At the end of any Ultra DMA burst the host shall send the results of its CRC calculation function to the
device on D[15:00] with the negation of – DMACK.
Swissbit AG
Industriestrasse 4
Swissbit reserves the right to change products or specifications without notice.
Revision: 1.51
CH-9552 Bronschhofen
Switzerland
www.swissbit.com
industrial@swissbit.com
C-300_data_sheet_CF-HxBK_Rev151.doc
Page 43 of 99
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
SFCF64GBH2BU4TO-I-NU-517-STD FLASH SLC UDMA/MDMA/PIO 64GB
SFN08B4702CBQLF7 RES ARRAY 47K OHM 7 RES 8-DFN
SFP1050-12BG FRONT END AC/DC 1050W 12V
SFP450-12BG PWR SUP 450W 12V 36.6A W/STANDBY
SFSD1024N1BN1TO-I-DF-151-STD FLASH MICRO SD CARD IND S-200 1G
SFSD2048L1BN2TO-I-DF-151-STD FLASH SECURE DGTL CARD SD 2G
SFSD4096L1BN2TO-I-Q2-141-STD FLASH SECURE DGTL CARD SDHC 4G
SFSD8192N1BW1MT-E-QG-111-STD FLASH MICRO SD 8GB EXT TEMP
相关代理商/技术参数
SFCF64GBH2BU4TO-C-NU-527-STD 制造商:SWISSBIT 功能描述:CFC C-440 DENSITY COMMERCIAL - Trays 制造商:SWISSBIT NA INC 功能描述:FLASH
SFCF64GBH2BU4TO-I-NU-517-STD 功能描述:FLASH SLC UDMA/MDMA/PIO 64GB RoHS:是 类别:存储卡，模块 >> 存储器，PC 卡 系列:C-440 标准包装:30 系列:- 存储容量:8GB 存储器类型:存储卡 - Extreme III SD?
SFCF64GBH2BU4TO-I-NU-527-STD 制造商:SWISSBIT 功能描述:CFC C-440 DENSITY INDUSTRIAL - Trays 制造商:SWISSBIT NA INC 功能描述:FLASH CARD 64GB IND C-440 制造商:Swissbit 功能描述:Memory Cards 64GB IND COMPACT FLASH SLC NAND C440
SFCF8192H1BO2TO-C-Q1-523-SMA 制造商:SWISSBIT NA INC 功能描述:FLASH
SFCF8192H1BO2TO-C-Q1-533-ZP1 制造商:SWISSBIT NA INC 功能描述:FLASH
SFCF8192H1BO2TO-C-Q1-543-SMA 制造商:SWISSBIT NA INC 功能描述:FLASH
SFCF8192H1BO2TOIQ1523SMA 制造商:Swissbit 功能描述:Flash Card 8G-Byte 3.3V/5V CompactFlash 50-Pin
SFCF8192H1BO2TO-I-Q1-523-SMA 功能描述:FLASH SLC UDMA/MDMA/PIO 8G RoHS:是 类别:存储卡，模块 >> 存储器，PC 卡 系列:C-320 标准包装:30 系列:- 存储容量:8GB 存储器类型:存储卡 - Extreme III SD?